1. Field of the Invention
The present invention generally relates to initialization schemes, and more particularly, to an intelligent volatile memory scheme that performs or bypasses the volatile memory initialization function in response to different reset causes.
2. Description of the Prior Art
Volatile memory devices such as Dynamic Random Access Memory (DRAM) and Static Random Access Memory (SRAM) sustain data only while an appropriate level of power is supplied to the memory chips. Moreover, volatile memory devices have a higher failure rate relative to non-volatile memory or non-memory devices. Data loss and/or data corruption caused by a loss of power supplied to the memory device or a memory device failure are thus a concern to memory manufacturers, system integrators, and end users alike.
It is common practice, therefore, to add device failure detection logic, such as parity error detection, when designing memory sub-system circuitry. Parity error detection works in the following way. Whenever a memory device is being written, a parity bit or bits is generated and written in the memory at the same address location. When the memory device is thereafter read, a new parity bit or bits is generated based on the data read. The generated or read parity bit is compared to the parity bit stored during the last write operation--if they are not the same value a parity error is flagged.
After power-up, the memory sub-system contains neither valid data nor valid parity bits. Since a read operation at this point may cause a parity error, the entire memory needs to be initialized prior to its first use. This is accomplished by writing once in the beginning with valid data after the system is reset. However, this initialization operation can take anywhere from a few seconds to tens of seconds, depending on several factors, including the processor's operation speed, the access time of the memory device, and the size of the memory.
This disadvantage, particularly the dependence on the memory size, is becoming more and more noticeable as newer, larger application programs are introduced that require greater amounts of memory to run.
A second disadvantage of the initialization operation is that the prior contents of the memory are not preserved, which can be frustrating and inconvenient. For example, if a large file is down loaded to memory from a host system, it is necessary to down load the same large file every time the system is reset. This is because conventional reset schemes initialize the memory, regardless of what caused the system to reset.
In light of the foregoing, there exists a need for an apparatus and method for differentiating among the causes for the system to reset and implementing the memory initialization operation only when a power-on reset (POR), brown-out, or other like condition occurs.